Analysis of an Anomalous CMOS Transistor Exhibiting Drain to Source Leakage –Its Model and Cause
Analysis of an Anomalous CMOS Transistor Exhibiting Drain to Source Leakage –Its Model and Cause
Tuesday, November 11, 2014: 11:35 AM
310 B (George R. Brown Convention Center )
Summary:
A MOSFET exhibiting excessive source to drain leakage was successfully modeled as a device formed by a transistor and a resistor in parallel. The hypothesis of a channel counter doping defect as one of the two most likely causes, based on electrical characterization data, was verified by SCM dopant mapping technique that revealed an n-type counter doped band linking source and drain. TEM analysis showed that a silicon dislocation was the root cause. Comparisons with previous work indicated that the device model is dependent on the magnitude of the counter doping in the channel due to different root causes.
A MOSFET exhibiting excessive source to drain leakage was successfully modeled as a device formed by a transistor and a resistor in parallel. The hypothesis of a channel counter doping defect as one of the two most likely causes, based on electrical characterization data, was verified by SCM dopant mapping technique that revealed an n-type counter doped band linking source and drain. TEM analysis showed that a silicon dislocation was the root cause. Comparisons with previous work indicated that the device model is dependent on the magnitude of the counter doping in the channel due to different root causes.