Introduction to Verification and Test Using a 4-bit Arithmetic Logic Unit Including a Failure Module in a Xilinx XC9572XL CPLD

Thursday, November 13, 2014: 3:20 PM
310 B (George R. Brown Convention Center )
Dr. Martin Versen , University of Applied Sciences Rosenheim, Rosenheim, Germany
Mr. Michael Hayn , University of Applied Sciences Rosenheim, Rosenheim, Germany