Mr. H.H. Yap

Global Foundries
Technology Development- New Technology Prototyping
60 Woodlands Industrial Park D Street 2
Singapore Singapore 738406

Papers:
Utilizing Nanoprobing and Circuit Diagnostics to Identify Key Failure Mechanism of Otherwise Non-Visible Defects in 20nm Logic Devices Investigation of Protection Layer Materials for Ex-situ 'lift-out' TEM sample Preparation Technique with FIB for 14nm FinFET Application of Fast Laser Deprocessing Techniques in Physical Failure Analysis on SRAM Memory of Advance Technology