21.3
Failure Analysis of ILD Delamination – Uncovering Multiple Root Causes

Thursday, November 5, 2015: 1:30 PM
Meeting Room D139 & 140 (Oregon Convention Center )
Dr. Marie Castignolles , Freescale Semiconductor, Inc., Toulouse, France
Mr. Thomas Zirilli , Freescale Semiconductor, Inc., Toulouse, France
Mr. Eric Cattey , Freescale Semiconductor, Inc., Tempe, AZ
Mr. Justin C Lewenstein , Freescale Semiconductor, Inc., Tempe, AZ
Dr. Stephen N Schauer , Freescale Semiconductor, Inc., Chandler, AZ
Dr. Wei Liu , Freescale Semiconductor, Inc., Chandler, AZ
Mr. Jianfeng Chen , Freescale Semiconductor, Inc., Chandler, AZ
Mr. Jacob Hammett , Freescale Semiconductor, Inc., Chandler, AZ
Dr. Sam Subramanian , Freescale Semiconductor, Inc., Austin, TX

Summary:

FA simply cannot consist in jumping to conclusions. The FA process is validated through correlation with the initial failure as well as interpretation of obtained results, subjective by definition. That paper illustrates the difficulty of addressing failures due to multiple causes, including wafer fabrication, assembly and application conditions. The underlying causes were subtle to identify as opposed to obvious apparent causes. Inter-Layer Dielectric (ILD) delamination was experienced on different devices from a single technology. A complete set of techniques (C-SAM, Laser and optical microscopy, SEM, FIB cross-sections, TEM, EFTEM, SIMS, Auger, Delineation) were used as different pieces of the same puzzle to reveal the multiple causes. The appropriate set of information on the device traceability also helped define an accurate FA approach, with an appropriate sample preparation and with the right techniques.