Pulse Laser Ablation Techniques for IC Package Substrate Modifications and Validation
Pulse Laser Ablation Techniques for IC Package Substrate Modifications and Validation
Wednesday, November 9, 2016
Summary:
Post silicon validation techniques on packaged integrated circuit (IC) samples positively impact time to market (TTM) by saving considerable fabrication modification turnaround time and costs. These modifications are typically done through the backside accessing the transistor level. However, in some cases, package substrate metal layers accessed from the front side is beneficial and can be done with laser ablation techniques.
Post silicon validation techniques on packaged integrated circuit (IC) samples positively impact time to market (TTM) by saving considerable fabrication modification turnaround time and costs. These modifications are typically done through the backside accessing the transistor level. However, in some cases, package substrate metal layers accessed from the front side is beneficial and can be done with laser ablation techniques.