Capturing Defects in Flip-Chip CMOS Devices Using Backside EBAC Technique and SEM Microscopy
Capturing Defects in Flip-Chip CMOS Devices Using Backside EBAC Technique and SEM Microscopy
Monday, November 7, 2016: 2:50 PM
110AB (Fort Worth Convention Center)
Summary:
This paper presents a chip level failure analysis method and case studies that uses a combination of SEM microscopic imaging and backside Electron Beam Absorbed Current (EBAC) technique to localize and analyzing open/short in interconnect and transistor level defects from backside of a semiconductor IC device.
This paper presents a chip level failure analysis method and case studies that uses a combination of SEM microscopic imaging and backside Electron Beam Absorbed Current (EBAC) technique to localize and analyzing open/short in interconnect and transistor level defects from backside of a semiconductor IC device.