Optimization of EeLADA for Circuit Logic Defect Localization Using Defect Simulation

Thursday, November 10, 2016: 1:20 PM
110AB (Fort Worth Convention Center)
Mr. Boon Lian Yeoh , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Dr. SH Goh , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Dr. Guofeng You , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Mr. Alan Tan , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Mr. Ying Hong Chan , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Ms. Lin Zhao , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Ms. Hnin Hnin Win Thoungh MA , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Mr. Ang Ghim Boon , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Dr. Lam Jeffrey , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Mr. Hao Hu , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Mr. Varun Gupta , GLOBALFOUNDRIES Singapore Pte Ltd, Singapore, Singapore
Chee-Chun Tay , Mentor Graphics Corporation, n/a, Singapore

See more of: Fault Isolation II
See more of: Technical Program