Special sample preparation methodology for Cu pillar bump characterization on Advance Thin Small Leadless (ATSLP) Flip Chip with Copper Pillar (CuP) Bump Interconnect technology
Special sample preparation methodology for Cu pillar bump characterization on Advance Thin Small Leadless (ATSLP) Flip Chip with Copper Pillar (CuP) Bump Interconnect technology
Wednesday, October 31, 2018: 9:15 AM
226BC (Phoenix Convention Center)
Summary:
This paper discuss and demonstrate a quick, reliable and cost effective methodology to mechanically removed the Advance Thin Small Leadless (ATSLP) flip chip while preserving the Cu pillar for later Cu pillar characterization especially on solder joint integrity.
This paper discuss and demonstrate a quick, reliable and cost effective methodology to mechanically removed the Advance Thin Small Leadless (ATSLP) flip chip while preserving the Cu pillar for later Cu pillar characterization especially on solder joint integrity.