Creative Approach Using Lock-in Thermography in Fault Localization of ASIC Devices
Creative Approach Using Lock-in Thermography in Fault Localization of ASIC Devices
Wednesday, October 31, 2018: 8:50 AM
225AB (Phoenix Convention Center)
Summary:
The advent of lock-in thermal imaging application on semiconductor failure analysis added capability to localize failures on the die through detection of thermal emissions. When coupled with creative electrical set-up and sample preparations, Lock-in Thermography (LIT) application gives more possibility in exploring the failure of the device using low power settings. This gives higher probability of preserving the defect which leads to a more conclusive root cause determination.
The advent of lock-in thermal imaging application on semiconductor failure analysis added capability to localize failures on the die through detection of thermal emissions. When coupled with creative electrical set-up and sample preparations, Lock-in Thermography (LIT) application gives more possibility in exploring the failure of the device using low power settings. This gives higher probability of preserving the defect which leads to a more conclusive root cause determination.