45th International Symposium for Testing and Failure Analysis (Nov. 10-14, 2019)

November 10 - 14, 2019

Invited Paper - Testing requirements for emerging single-chip cryogenic mixed-signalquantum processors in production FDSOI CMOS technology

This presentation will discuss testing requirements and challenges for two mixed-signal quantum processor architectures based on charge and spin qubits, respectively,  monolithically integrated with readout and microwave/mm-wave control electronics in commercial 22nm FDSOI CMOS technology, and intended for operation at 4-12 Kelvin. Both qubit schemes rely on minimum size MOSFETs and multi-gate cascodes operated in the subthreshold region for the quantum core. Qubit, circuit, and technology characterization on-die at cryogenic temperatures and up to 67 GHz will be discussed. Dr. Felix Beaudoin, GLOBALFOUNDRIES