(V) The Effect of Wafer Edge Cu Contamination on FinFET Devices
(V) The Effect of Wafer Edge Cu Contamination on FinFET Devices
Wednesday, November 3, 2021: 8:25 AM
104 ABC (Phoenix Convention Center)
Summary:
The effect of copper (Cu) contamination inside the Si substrate has been considered to be catastrophic to IC fabrication in the industry. The work presented in this paper provided different perceptions for this subject based on our systematic investigation in Samsung. When Cu came in direct contact with Si, the formation of -Cu3Si, with a well-defined crystalline structure and relatively stable stoichiometry, immobilizes Cu diffusion in the Si substrate. In other word, the impact of Cu diffusion in Si has no effect on device performances as long as -Cu3Si is not directly formed in the FinFET channel or presents to short any structures within the chip.
The effect of copper (Cu) contamination inside the Si substrate has been considered to be catastrophic to IC fabrication in the industry. The work presented in this paper provided different perceptions for this subject based on our systematic investigation in Samsung. When Cu came in direct contact with Si, the formation of -Cu3Si, with a well-defined crystalline structure and relatively stable stoichiometry, immobilizes Cu diffusion in the Si substrate. In other word, the impact of Cu diffusion in Si has no effect on device performances as long as -Cu3Si is not directly formed in the FinFET channel or presents to short any structures within the chip.