(V) SAMPLE PREPARATION AND DEVICE DEPROCESSING: Chip Recombination Method in Planar Deprocessing - A Solution for Failure Analysis on Chip Edge Defects

Wednesday, November 3, 2021
West Hall 1-2 (Phoenix Convention Center)
Mr. Kah Chin Cheong , Samsung Austin Semiconductor, LLC, Austin, TX, Samsung Austin Semiconductor, LLC, Austin, TX
Mr. Gabriel Pragay , Samsung Austin Semiconductor, LLC, Austin, TX
Mrs. Wiwy Wudjud , Samsung Austin Semiconductor, LLC, Austin, TX
Mr. Rafael Lainez , Samsung Austin Semiconductor, LLC, Austin, TX

Summary:

Planar deprocessing is a vital failure analysis (FA) technique for semiconductor chip reverse engineering. The basic concept of planar deprocessing is to remove all the “unnecessary” materials of a chip to expose an area of interest (AOI) and maintain the chip planarity and surface evenness. Finger deprocessing is one of the common techniques applied to this concept. This technique is essential in physical FA, especially for advanced bulk fin field-effect transistor (FinFET) devices. The success of finger deprocessing technique depends on certain factors, one of which is the location of AOI region. Application of finger deprocessing becomes incredibly challenging for AOI close to chip edge due to the chip edge effect, i. e. the chip edge is deprocessed much faster than the chip center. Plasma focused ion beam (PFIB) planar deprocessing is the primary solution to solve this problem. However, the PFIB capability is a luxury tool for most analysis labs. To overcome this challenge, a novel chip recombination method is introduced. With this method, planar deprocess can be achieved by conventional finger deprocessing technique and more importantly can be applied in general analysis labs. This paper will discuss the newly developed method in a step-by-step guide basis and show two cases with AOI(s) in the chip edge region to demonstrate its capability.
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