Detecting Wafer Level Cu Pillar Defects Using Advanced 3D X-ray Microscopy (XRM) with Submicron Resolution

Thursday, November 16, 2023: 8:00 AM
104 A-B (Phoenix Convention Center)
Ms. Susan Li , Infineon Technologies, San Jose, CA
Mr. John Frame , Infineon Technologies, San Jose, CA
Ms. Edita Madriaga-Berry , Infineon Technologies, San Jose, CA
Mr. Jose Hulog , Infineon Technologies, San Jose, CA
Dr. Ming Zhang , Infineon Technologies, San Jose, CA
Masako Terada , Carl Zeiss Microscopy, Dublin, CA
Mr. Allen Gu , Carl Zeiss Microscopy, Pleasanton, CA
Mr. David Taraci , Carl Zeiss Microscopy, Pleasanton, CA

Summary:

In this work we present a new defect localization capability on Wafer Level Chip Scale Packages (WLCSP) with small-scale Cu pillars using advanced 3D X-ray microscopy (XRM). In comparison to conventional Micro-CT flat-panel technology, the synchrotron-based optically enhanced 3D X-ray microscopy can detect very small defects with submicron resolutions. Two case studies on actual failures (one from the assembly process and one from reliability testing) will be discussed to demonstrate this powerful defect localization technique. Using the tool has helped speed up the failure analysis (FA) process by locating the defects non-destructively in a matter of hours instead of days or weeks as needed with destructive physical failure analysis.