Dimensionality Reduction and Clustering of Wafer-Level Data to Optimize Use of Failure Analysis Resources

Tuesday, November 14, 2023: 10:50 AM
104 A-B (Phoenix Convention Center)
Mr. James David De La Torre , Intel Corporation, Gilbert, AZ
Mr. Don Kent , Intel Corporation, Gilbert, AZ
Mr. David Pivin , Intel, Phoenix, AZ
Mr. Eric St Pierre , Intel Corporation, Chandler, AZ

Summary:

A methodology for clustering wafer data by their signatures in a high-dimensional feature space and determining the most important features for a given cluster. By pooling information gathered from all wafers in a given cluster, it is easier to determine the cause of observed feature signatures on wafers. This enables more efficient use of failure analysis (FA) resources, as they can be focused on clusters with no existing root cause information.