Multilayer pFIB Trenches for Multiple Tip EBAC/EBIRCH Analysis and Internal Node Transistor Characterization

Thursday, November 16, 2023: 1:30 PM
103 A-B (Phoenix Convention Center)
Mr. Nicholas Pronin , NXP Semiconductors, Austin, TX
Dr. Stefano Larentis , NXP Semiconductors, Austin, TX
Mr. Carey Wu , NXP Semiconductors, Austin, TX
Mr. Eric Foote , NXP Semiconductors, Austin, TX
Dr. Gary Clark , NXP Semiconductors, Austin, TX
Mrs. Khiem Ly , NXP Semiconductors, Austin, TX
Mr. Jacob Levenson , NXP Semiconductors, Austin, TX
Mr. Kristofor Dickson , NXP Semiconductors, Austin, TX
Mr. Charles Petri , NXP Semiconductors, Austin, TX
Mr. Nelson Gomez , NXP Semiconductors, Austin, TX
Mr. Tony Chrastecky , NXP Semiconductors, Austin, TX

Summary:

In this work, we present three case studies that highlight the novelty and effectiveness of using multiple plasma assisted focused ion beam trenches to simultaneously access multiple metal layers for nanoprobing failure analysis. Multilayer access enabled otherwise impossible two-tip current imaging techniques and allowed us to fully characterize suspect logic gate transistors by exposing internal nodes, while preserving higher metal inputs and outputs. The presented case studies focus on late node planar and established FinFET technologies. The delayering techniques used are not necessarily technology dependent, but highly scaled and advanced processes generally require smaller trench areas for multilayer access. The minimum trench dimensions are limited by ion beam imaging resolution and trench-nanoprobe tip geometry.