On Demand Bit-Level SRAM Validation using CW 785nm Laser-Induced Fault Analysis (LIFA)
On Demand Bit-Level SRAM Validation using CW 785nm Laser-Induced Fault Analysis (LIFA)
Monday, November 13, 2023: 10:20 AM
301A (Phoenix Convention Center)
Summary:
We present the first experimental demonstration of on demand bit-level Static Random Access Memory (SRAM) validation and isolation through the exploitation of a continuous wave (CW) 785nm Laser-Induced Fault Analysis (LIFA) system. Through careful test pattern edits and the observation of a simple pass/fail flag, the ability to spatially map the physical location of pre-selected bits in both 16nm and 5nm SRAM arrays using correlation units is confirmed. This work demonstrates a novel and highly-efficient methodology for rapid bit-level logical-to-physical identification. It significantly improves localization efficacy over conventional bitmap validation best-known methods (BKM) which typically rely on post-fail Photo-Emission Microscopy (PEM) and/or Soft Defect Localization / Laser-Assisted Device Alteration (LADA) performed on an actual fail unit. This new technique re-defines the state-of-the-art in SRAM bitmap validation and localization and offers a pathway to significantly improve cycle time for both product bitmap qualification and subsequent root cause identification.
We present the first experimental demonstration of on demand bit-level Static Random Access Memory (SRAM) validation and isolation through the exploitation of a continuous wave (CW) 785nm Laser-Induced Fault Analysis (LIFA) system. Through careful test pattern edits and the observation of a simple pass/fail flag, the ability to spatially map the physical location of pre-selected bits in both 16nm and 5nm SRAM arrays using correlation units is confirmed. This work demonstrates a novel and highly-efficient methodology for rapid bit-level logical-to-physical identification. It significantly improves localization efficacy over conventional bitmap validation best-known methods (BKM) which typically rely on post-fail Photo-Emission Microscopy (PEM) and/or Soft Defect Localization / Laser-Assisted Device Alteration (LADA) performed on an actual fail unit. This new technique re-defines the state-of-the-art in SRAM bitmap validation and localization and offers a pathway to significantly improve cycle time for both product bitmap qualification and subsequent root cause identification.