Invited Talk: Raj Sankaralingham, Texas Instruments, presents, "ESD Design, Testing and Debug".

Wednesday, October 30, 2024: 1:00 PM-1:40 PM
202 (Hilton San Diego Bayfront)
Dr. Raj Sankaralingham
Texas Instruments and ESDA

Title: “ESD Design, Testing and Debug”

Abstract:
This talk will cover ESD fundamentals, ESD test methods, analog vs digital ESD design approaches, and ESD failure troubleshooting process.

Biography:
Raj Sankaralingam leads ESD technology development across TI technologies from advanced CMOS to high voltage analog. Previously, Raj managed ESD design support for all TI business units for over ten years leading ESD design reviews and failure debug efforts. Raj was instrumental in development of in-house ESD topology checker and custom simulation infrastructure in TI to enable correct-by-design ESD integration for TI products. Raj has a PhD in Electrical Engineering from University of Notre Dame. Jayant D'Souza, SIEMENS USA and Mr. Saidapet Ramesh, NXP Semiconductors

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