Streamlined Advanced Semiconductor FA Through In-Situ CAFM and Plasma FIB Integration
Streamlined Advanced Semiconductor FA Through In-Situ CAFM and Plasma FIB Integration
Monday, November 17, 2025: 11:30 AM
2 (Pasadena Convention Center)
Summary:
This work presents a streamlined and efficient failure analysis methodology for advanced integrated circuits by integrating an in-situ CAFM-pFIB platform. This approach eliminates repeated vacuum cycles and manual transfers, significantly reducing analysis time while preserving pristine surfaces for high-quality CAFM imaging. The system's effectiveness was validated through case studies, including one on a stacked-die package where pFIB milling was used not only for in-situ delayering across multiple layers but also for creating a grounding path to enable successful CAFM localization of leaky gate defects. This integrated platform also made possible a novel Scanning EBIC Microscopy technique for mapping subsurface junction behavior, offering new capabilities for nanoscale defect localization in complex semiconductor technologies.
This work presents a streamlined and efficient failure analysis methodology for advanced integrated circuits by integrating an in-situ CAFM-pFIB platform. This approach eliminates repeated vacuum cycles and manual transfers, significantly reducing analysis time while preserving pristine surfaces for high-quality CAFM imaging. The system's effectiveness was validated through case studies, including one on a stacked-die package where pFIB milling was used not only for in-situ delayering across multiple layers but also for creating a grounding path to enable successful CAFM localization of leaky gate defects. This integrated platform also made possible a novel Scanning EBIC Microscopy technique for mapping subsurface junction behavior, offering new capabilities for nanoscale defect localization in complex semiconductor technologies.