Effective Failure Analysis Approach in Locating Circuit Level Continuity Defects

Tuesday, November 18, 2025: 11:10 AM
2 (Pasadena Convention Center)
Mr. Raymond G. Mendaros , Analog Devices General Trias (ADGT), Brgy. Javalera, Gen. Trias, Cavite, Philippines
Ms. Jolina May Matibag , Analog Devices General Trias (ADGT), Brgy. Javalera, Gen. Trias, Cavite, Cavite, Philippines
Mr. Christian reyes , Analog Devices General Trias (ADGT), Brgy. Javalera, Gen. Trias, Cavite, Cavite, Philippines
Mr. Ricardo Calanog , Analog Devices General Trias (ADGT), Brgy. Javalera, Gen. Trias, Cavite, Philippines
Mr. Robin Evangelista , Analog Devices General Trias (ADGT), Brgy. Javalera, Gen. Trias, Cavite, Philippines

Summary:

Uncovering high-resistance to open-circuit defects in integrated circuits demands a thorough and methodical failure analysis (FA) approach. These elusive defects often escape detection, showing only subtle signs like low current during electrical verification or high resistance in I-V curve tracing, making fault isolation difficult and time-consuming. This paper highlights three compelling case studies that showcase the practical application and effectiveness of the FA approach in exposing the root cause: missing or damaged Thin Film Resistors (TFRs). Through detailed analysis, these resistors were revealed as the key culprits behind continuity failures, demonstrating how a strategic FA process can uncover subtle circuit-level defects.