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Session 13: Yield Enhancement
Location: Meeting Room J1-J2 (San Jose McEnery Convention Center)
(Please check final room assignments on-site).
Session Description:

Session Chair:Ms Carol Boye IBM
11:00 AMTool-Related ESD Surface Damage (ESDFOS) on Wafers in Cu Technology
11:25 AMDetection and Verification of Silicide Pipe Defects on SOI Technology using Voltage Contrast Inspection
11:50 AMPhoto Process Margin Leading To IC Failures- A case Study
12:15 PMFailure Analysis of Multi Finger HV Symmetric Device for Charge Pumping Circuit Application
12:40 PMCu Voiding in 90nm Technology Through Photovoltaic-Driven Electrochemical Dissolution