35th International Symposium for Testing and Failure Analysis (November 15-19, 2009): Session 10: Failure Analysis Process

Thursday, November 19, 2009: 10:15 AM-11:30 AM

Meeting Room J1-J2 (San Jose McEnery Convention Center)

Session Chair:

Mr. Jim Colvin

10:15 AM

Failure Analysis of Stacked-Die Devices by Combining Non-Destructive Localization- and Target Preparation Methods
Mr. Christian Schmidt, Fraunhofer Institute for Mechanics of Materials; Michél Simon, Fraunhofer Institute for Mechanics of Materials; Frank Altmann, Fraunhofer Institute for Mechanics of Materials; Antoine Nowodzinski, CEA-LETI Minatec

10:40 AM

Challenges Facing the Detection of Leakage Current in Integrated Circuit (IC) Devices
Dr. Suey Li Toh, Chartered Semiconductor Manufacturing Pte. Ltd.; E. Hendarto, Chartered Semiconductor Manufacturing Pte. Ltd.; J. Sudijono, Chartered Semiconductor Manufacturing Pte. Ltd.; P.K. Tan, Chartered Semiconductor Manufacturing Pte. Ltd.; Y.W. Goh, Chartered Semiconductor Manufacturing Pte. Ltd.; H.B. Lin, Chartered Semiconductor Manufacturing Pte. Ltd.; Q. Deng, Chartered Semiconductor Manufacturing Pte. Ltd.; H. Tan, Chartered Semiconductor Manufacturing Pte. Ltd.; L. Zhu, Chartered Semiconductor Manufacturing Pte. Ltd.; Q.F. Wang, Chartered Semiconductor Manufacturing Pte. Ltd.; H.L. Li, Chartered Semiconductor Manufacturing Pte. Ltd.; R. He, Chartered Semiconductor Manufacturing Pte. Ltd.; J. Lam, Chartered Semiconductor Manufacturing Pte. Ltd.; Z.H. Mai, Chartered Semiconductor Manufacturing Pte. Ltd.

11:05 AM

Analysis of a Media Processor Functional Failure
Mr. Alan J. Putman, Intel Corporation

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