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17 Session 17: Device Level Sample Prep

Wednesday, November 14, 2012: 3:30 PM-5:35 PM
101AB (Phoenix Convention Center)
Session Chairs:
Mr. Bryan Tracy and Mr. Roger Alvis
3:30 PM
17.1
Metallic Nanoneedles Arrays for “Lift-Out” TEM Sample Preparation
Dr. Romaneh Jalilian, NaugaNeedles; Brian Miller, Nanolab Technologies, Inc; David Mudd, NaugaNeedles; Neil Torrez, NaugaNeedles; Jose Rivera, NaugaNeedles; Dr. Mehdi M. Yazdanpanah, NaugaNeedles
3:55 PM
17.2
Deprocessing Methodologies for Detection of IBC and Cell to Cell Short in Submicron DRAM
Mr. Ramachandra Chitakudige, Central Manufacturing Technology Institute; Dr. Sarat Kumar Dash, ISRO Satellite Center; Dr. Asif Khan, Mangalore University
4:20 PM
17.3
Routine Backside FIB Milling With EXpressLO(TM)
Dr. Lucille A. Giannuzzi, L.A. Giannuzzi & Associates LLC
4:45 PM
17.4
High-Throughput, Site-Specific TEM Sample Preparation of Sub-20nm Thick Lamella for Process Metrology and Failure Analysis
Mr. Roger Alvis, FEI Company; Jeff Blackwood, FEI Company; Sang-Hoon Lee, FEI Company; Mr. Matthew Bray, FEI Company
5:10 PM
17.5
Failure Analysis of Electronic Material Using Cryogenic FIB-SEM
Mr. Nicholas Antoniou, Harvard University; Cheryl Hartfield, Omniprobe, Inc.; Adam C Graham, Harvard University; Gonzalo Amador, Omniprobe, Inc.
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