Package and Physical Analysis Challenges I

Sunday, November 6, 2016: 8:00 AM-11:30 AM
110B (Fort Worth Convention Center)
Package and Physical Analysis Challenges
Session Chairs:  Mr. Chris Richardson, FA Products & Applications, Allied High Tech Products, Inc., Rancho Dominguez, CA and Ms. Susan Li, Failure Analysis Lab, Cypress Semiconductor, San Jose, CA
8:00 AM
Chip Scale Packaging and Its Failure Analysis Challenges
Ms. Susan Li, Cypress Semiconductor
9:00 AM
Flip Chip and Backside Techniques
Dr. Edward I. Cole Jr., Sandia National Laboratories
10:00 AM
Break
10:30 AM
SAM vs X-RAY
Dr. Thomas M. Moore, Waviks, Inc.
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