Case Studies: FA Process and Workflows I

Tuesday, November 14, 2023: 12:50 PM-2:10 PM
104 A-B (Phoenix Convention Center)
Dr. Wentao Qin, Microchip and Dr. Juntao Li, IBM Research
12:50 PM
Inline Defect Solution to Mitigate EOL Device Failures
Dr. Yong Guo, Samsung Austin Semiconductor, LLC
1:10 PM
Avalon-Aided Mapping of Fault Localized Area of ADIs Radar Receive Path Analog FrontEnd Amplifier with 0.18um 6-metal CMOS Fab Process
Mr. Arnulfo M. Evangelista, BS Electronics & Communication Engineering, Analog Devices Inc; Mr. Khristopherson C. Cajucom, Analog Devices Inc; Mrs. Janella Alfelor-Igtiben, Analog Devices Inc; Mr. John David Mangali, Analog Devices Inc
1:30 PM
Failure Localization Technique for Metal and Transistor Defects Through Avalon CAD Navigation and Focused Ion Beam Circuit Edit
Ms. Joana Mae De Jesus, Analog Devices; Mr. Mark Anthony Acedillo, Analog Devices
1:50 PM
A Multiscale and Multimodal Correlative Microscopy Workflow to Characterize a Copper Segregation Identified in Epitaxial Layer in Power MOSFETs
Dr. Flavio Cognigni, Sapienza University of Rome, Italy, Sapienza University of Rome, Italy; Dr. Heiko Stegmann, Carl Zeiss Microscopy GmbH; Mr. Giuseppe Sciuto, STMicroelectronics; Dr. Giuseppe Anastasi, STMicroelectronics; Mr. Massimiliano Astuto, STMicroelectronics; Dr. Marco Bonadonna, STMicroelectronics; Prof. Marco Rossi, Sapienza University of Rome, Italy; Dr. Domenico Mello, STMicroelectronics
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