FA Process: Fault Isolation, Mechanisms, & Solutions I

Tuesday, November 18, 2025: 10:30 AM-11:50 AM
3 (Pasadena Convention Center)
Mr. Kah Chin Cheong, Samsung Austin Semiconductor, LLC and Vinod Narang, Advanced Micro Devices (S) Pte Ltd
10:30 AM
A Review of IO Debug Techniques in Chip-Level Failure Analysis: Case Studies and Workflow
Mr. Thong Doan, NVIDIA
10:50 AM
High-Precision Fault Localization in LSI Using Photo Emission Microscopy with Logical State Consideration
Mr. Yasushi Oka, Renesas Electronics Corporation; Mr. Nakaba Matsui, Hamamatsu Photonics K. K
11:10 AM
3.5D Package FA – The Challenges and Innovative Solutions to Successful Root Cause Analysis
Ms. Wen Qiu, Advanced Micro Devices (AMD)
11:30 AM
Enabling Volume Electrical Fault Isolation Workflow with Automation to Enhance Throughput and Success Rate
Mr. D. Nagalingam, GlobalFoundries Singapore; Dr. A.C.T. Quah, GlobalFoundries Singapore; Mr. J.C. Alag, GlobalFoundries Singapore; Mr. Y.H. Chan, GlobalFoundries Singapore; Mr. P.K. Tan, GlobalFoundries Singapore; Dr. C.Q. Chen, GlobalFoundries Singapore; Mr. C.M. Chua, SEMICAPS PTE LTD; Mr. S.H. TAN, SEMICAPS PTE LTD; Prof. J.F. Pan, SEMICAPS PTE LTD
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