Product Yield, Test and Diagnostics

Monday, November 17, 2025: 10:20 AM-11:10 AM
Ballroom B (Pasadena Convention Center)
Jayant D'Souza, SIEMENS USA and Dr. Venkat Ravikumar, Advanced Micro Devices - Singapore Pte Ltd
10:20 AM
Region-based Characterization of Defective Logic Circuits
Ruben Purdy, Carnegie Mellon University; Ziyad Alswaidan, Carnegie Mellon University; Xu He, Carnegie Mellon University; Chris Nigh, Carnegie Mellon University; Shawn Blanton, Carnegie Mellon University
10:40 AM
Accelerating Time to Market with Unified Scan Diagnostics and Volume-Based Defect Detection
Mr. Kiran (Sunny) Thota, NXP; Mr. Ramesh Saidapet, NXP; Mr. Dan Bodoh, NXP Semiconductors; Mrs. Yi Sun, NXP; Mr. Brandon Ussery, NXP; Mr. Naren Ramesh, Siemens Digital Industries Software
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