FA Process: Fault Isolation, Mechanisms, & Solutions II
Tuesday, November 18, 2025: 12:50 PM-1:30 PM
3 (Pasadena Convention Center)
12:50 PM
Latency of via failure from corrosion
Dr. Wentao Qin, Microchip Technologies Inc.;
Mr. Esteban Ortiz, Microchip Technologies Inc.;
Mr. Raj Kabadi, Microchip Technologies Inc.;
Mr. Brian Anderson, Microchip Technologies Inc.;
Mr. Al Merino, Microchip Technologies Inc.
1:10 PM
Comprehensive Fault Isolation Technologies for the Gate-All-Around Transistor and Backside Power Delivery Paradigm Shifts
Mitchell J. Senger, Intel Corporation;
Mauricio Posada, Intel Corporation;
Christopher Morgan, Intel Corporation;
Megan Knapp, Intel Corporation;
Grace Mei Ee Khoo, Intel Corporation;
Bathiya P. Senevirathna, Intel Corporation;
Praneeth Ranga, Intel Corporation;
Ryan Fredrickson, Intel Corporation;
MIR Tanjidur Rahman, Intel Corporation;
Travis Williams, Intel Corporation;
Samantha Lubaba Noor, Intel Corporation;
Manoj Devendhiran, Intel Corporation;
Prasoon Joshi, Intel Corporation;
Ashkan Abtahi, Intel Corporation;
Kimberlee Celio, Intel Corporation;
Joseph Basile, Intel Corporation;
Eric Norum, Intel Corporation;
Miriam Cezza, Intel Corporation;
Matthew H. Kirsch, Intel Corporation;
Samia N Rahman, Intel Corporation;
Hasan Faraby, Intel Corporation;
Joshua W. Kevek, Intel Corporation;
Martin von Haartman, Intel Corporation;
Baohua Niu, Intel Corporation
