Reverse Engineering II

Tuesday, November 8, 2016: 2:55 PM-5:00 PM
110AB (Fort Worth Convention Center)
Chairs:  Prof. Domenic Forte, PhD, Electrical and Computer Engineering, University of Florida, Gainesville, FL
Co-chairs:  Dr. Juana Rudati, Defense Microelectronics Activity (DMEA), San Francisco, CA
3:20 PM
Direct charge measurement in Floating Gate transistors of Flash EEPROM using Scanning Electron Microscopy
Dr. Franck Courbon, University of Cambridge; Dr. Sergei Skorobogatov, University of Cambridge; Mr. Christopher Woods, Quo Vadis Labs
3:45 PM
Automated Detection of Fault Sensitive Locations for Reconfiguration Attacks on Programmable Logic
Mr. Heiko Lohrke, TUB Technische Universitaet Berlin; Mr. Shahin Tajik, TUB Technische Universitaet Berlin; Dr. Philipp Scholz, TUB Technische Universitaet Berlin; Prof. Jean-Pierre Seifert, TUB Technische Universitaet Berlin; Prof. Christian Boit, TUB Technische Universitaet Berlin
4:10 PM
Gate-Level Netlist Reverse Engineering Tool Set for Functionality Recovery and Malicious Logic Detection
Mr. Travis Meade, University of Central Florida; Ms. Zheng Zhao, University of Texas at Austin; Dr. David Z. Pan, University of Texas at Austin; Dr. Yier Jin, University of Central Florida
4:35 PM
A New Methodology to Protect PCBs from Non-destructive Reverse Engineering
Zimu Guo, University of Florida; Bicky Shakya, University of Florida; Dr. Haoting Shen, PhD, University of Florida; Prof. Swarup Bhunia, PhD, University of Florida; Prof. Navid Asadizanjani, PhD, University of Florida; Prof. Domenic Forte, PhD, University of Florida; Prof. Mark Tehranipoor, PhD, University of Florida
See more of: Technical Program